Low-Power NoC for High-Performance SoC Design
Kirjan tiedot
| Kirjoittaja | Hoi-Jun Yoo |
|---|---|
| Kustantaja | Taylor & Francis Inc |
| Julkaistu | 2008 m. |
| Kieli | Englanti |
| Sivumäärä | 300 psl. |
| Sidosasu | Kovakantinen |
| Genre | Matematika |
| ISBN | 9781420051728 |
Tietoa kirjasta
Discover the groundbreaking insights in "Low-Power NoC for High-Performance SoC Design" by Hoi-Jun Yoo, published by Taylor & Francis Inc in 2008. This comprehensive guide spans 300 pages and delves into the intricacies of Network-on-Chip (NoC) technology, essential for modern System-on-Chip (SoC) design. Yoo expertly explains how to optimize communication using NoC, making complex concepts like computation partitioning and models of computation accessible to both professionals and enthusiasts alike. Whether you are a student, engineer, or researcher in the fields of electronics and computer engineering, this book is an invaluable resource that bridges the gap between theory and practical application. Enhance your understanding of low-power design strategies and elevate your SoC projects with this essential text.